TLDR I discovered that YosysHQ’s oss-cad-suite now “secretly” supports code entry not just in Verilog but also in VHDL. (Update: well I looked at older releases and VHDL support was there for a long time already – it just was not obvious to me! And I still see a lot of blog and forum posts...
Just before the end of January 2022, I published on itch.io a Twine ‘choose your own manifesto’ game called, We stayed up all night, my friends and I
We stayed up all night, my friends and I by Mita Williams